1. Field of the Invention
The present invention relates to a semiconductor device which is provided with a circuit including a semiconductor element such as a transistor, and a method for manufacturing the semiconductor device. For example, the present invention relates to a power device which is mounted on a power supply circuit; a semiconductor integrated circuit including a memory, a thyristor, a converter, an image sensor, or the like; and an electronic device on which an electro-optical device typified by a liquid crystal display panel, a light-emitting display device including a light-emitting element, or the like is mounted as a component.
In this specification, a semiconductor device means all types of devices which can function by utilizing semiconductor characteristics, and an electro-optical device, a light-emitting display device, a semiconductor circuit, and an electronic device are all semiconductor devices.
2. Description of the Related Art
Transistors formed over a glass substrate or the like are manufactured using amorphous silicon, polycrystalline silicon, or the like, as typically seen in liquid crystal display devices. Although transistors manufactured using amorphous silicon have low field-effect mobility, they can be manufactured over a larger glass substrate. On the other hand, although transistors manufactured using polycrystalline silicon have high field-effect mobility, they are not suitable for being manufactured over a larger glass substrate.
In contrast to transistors manufactured using silicon, attention has been drawn to a technique by which a transistor is manufactured using an oxide semiconductor and applied to an electronic device or an optical device. For example, Patent Document 1 and Patent Document 2 disclose a technique by which a transistor is manufactured using zinc oxide or an In—Ga—Zn—O-based oxide as an oxide semiconductor and is used as a switching element of a pixel or the like of a display device.
Patent Document 3 discloses a technique by which, in a staggered transistor including an oxide semiconductor, a highly conductive oxide semiconductor containing nitrogen is provided as buffer layers between a source region and a source electrode and between a drain region and a drain electrode, and thereby contact resistance between the oxide semiconductor and the source electrode and between the oxide semiconductor and the drain electrode is reduced.
Non-Patent Document 1 discloses a top-gate oxide semiconductor transistor in which a channel region, a source region, and a drain region are formed in a self-aligned manner by performing argon plasma treatment on an oxide semiconductor which is partly exposed to decrease resistivity of the oxide semiconductor in the exposed portions.
However, in this manner, when argon plasma treatment is performed on surfaces of the oxide semiconductor which are exposed, the oxide semiconductor in regions to be the source region and the drain region is also etched off, so that the source region and the drain region are reduced in thickness (see FIG. 8 of Non-Patent Document 1). Consequently, resistance of the source region and the drain region is increased, resulting in an increase in probability of occurrence of defective products due to over-etching caused when the thickness is reduced.
This problem is serious in the case where the atomic radius of ion species used in the plasma treatment performed on the oxide semiconductor is large.
There is no problem when the thickness of the oxide semiconductor layer is large enough; however, in the case where the channel length is set to less than or equal to 200 nm, the thickness of the oxide semiconductor layer in a region to be a channel is expected to be less than or equal to 20 nm, preferably less than or equal to 10 nm in order to prevent a short-channel effect. When such a thin oxide semiconductor layer is used, the plasma treatment as described above is unfavorable.